Typical integrated memory circuits include arrays of memory cells arranged in rows and columns. In many such integrated memory arrays, several redundant rows and columns are provided to be used as substitutes for defective locations in memory. When a defective bit location is identified, rather than treating the entire array as defective, a redundant row or column is substituted for the defective row or column. This substitution is performed by assigning the address of the defective row or column to the redundant row or column such that, when an address signal corresponding to the defective row or column is received, the redundant row or column is addressed instead.
To make substitution of the redundant row or column substantially transparent to a system employing the memory circuit, the memory circuit includes an address detection circuit. The address detection circuit monitors the row and column addresses and, when the address of a defective row or column is received, enables the redundant row or column instead.
One type of address detection circuit is a fuse-bank address detection circuit. Fuse-bank address detection circuits employ a bank of fuse based sense lines where each sense line corresponds to a bit of an address. The sense lines are programmed by blowing fuses in the sense lines in a pattern corresponding to the address of the defective row or column. Addresses are then detected by first applying a test voltage across the bank of sense lines. Then, bits of the address are applied to switches in the sense lines. If the pattern of blown fuses corresponds exactly to the pattern of address bits, the sense lines all block current and the voltage across the bank remains high. Otherwise, at least one sense line conducts and the voltage falls. A high voltage thus indicates the programmed address has been detected. A low voltage indicates a different address has been applied.
Typically, the fuses are blown by laser cutting the fuse conductors to remove the conductive paths through the fuses. One problem with such an approach is that laser cutting of the fuses is time consuming, difficult, and imprecise. As a consequence, the cost and reliability of memory devices employing fuse bank circuits can be less than satisfactory.
To eliminate the cost, difficulty, and expense of laser cutting, memory devices have recently been developed that employ antifuses in place of conventional fuses. Typical antifuses are parallel-plate capacitive structures that, in their unblown states, form open circuits. Such antifuses are "blown" by applying a high voltage across the antifuse. The high voltage causes a dielectric region of the parallel-plate capacitive structure to break down, forming a conductive path through the antifuse. Therefore, blown antifises conduct and unblown antifuses do not conduct.
Parallel-plate capacitive antifiuses can consume significant amounts of surface area on an integrated circuit die. Moreover, parallel-plate capacitive antifises can require different sequences of processing steps from the processing steps for fabricating the remainder of the integrated circuit die. Consequently, the space consumption and processing incompatibility of antifuses can make antifuses an undesirable alternative to the fuses.